The Control Unit Literature Review Example

The control unit directs the operation of all the other units of a computer system by providing timing and control signals. [1] It contains logic and timing circuits for generating the proper signals necessary for instruction execution in a program. The execution of instructions in a computer is a series of fetch – decode – execute cycles repeated over-and-over again until the computer is turned off. In achieving this cycle, the control unit fetches an instruction from memory by sending an address and a read command to the memory unit. The instruction word stored at the memory location in the memory unit is then transferred to the control unit, decoded by the logic unit in order to determine the instruction being requested and the right signals are then sent by the control unit to the other units in order to execute the command of the micro operations. Micro-operations are the atomic or functional operations of a processor which are simple steps of instructions that accomplish little on their own. Each micro-operation is executed in one clock cycle.
Considering the fetch cycle of processor at the beginning of an instruction cycle, the address of the first instruction to be executed in the program counter is moved into the memory address register (MAR) which is the only line connected to the address lines of the system bus and it specifies the address in memory for read and write operations. Placing the desired address in the MAR on the address bus, the control unit issues a READ command on the control bus, and the result which appears on the data bus is copied into the memory buffer register (MBR). The MBR contains either the last value read from memory or the value to be stored in memory and is connected to the data lines of the system bus. It is a temporary store of data before writing to memory or after reading from memory. At this point, the Program Counter (PC) is incremented to point to the address of the next instruction to be fetched. Since the two actions of reading word from memory and incrementing PC do not interfere with each other, they can be done together in a single clock cycle in order to save time. The contents of the MBR is then moved to the instruction register (IR) in order to free up the MBR for the next instruction cycle. The IR is the register that holds the last instruction fetched.

These series of operations involved in the fetch – decode – execute are presented in an example as follows:

For an ADD instruction where X is to be added to R1
ADD R1, X
t1: MAR ← (IR(address))
t2: MBR ← Memory
t3: R1 ← (R1) + (MBR)
Clock: This is sometimes referred to as the processor clock cycle time, and a unit of operation is performed within this cycle time.

Instruction register: The IR is used to determine which micro-operations to perform during the execute cycle.

Flags: The control unit uses the status flags to determine the status of the processor and the outcome of previous ALU operations.

Control signals from control bus provide signals to the control unit.

Control signals within the processor: Causing data to be moved from one register to another, and activating specific ALU functions.
Control signals to control bus: Control signals to memory, and to the Input / Output modules.
As can be seen, the control unit coordinates the operation of the computer system by generating the necessary timing and control signals, controlling the information transfer between RAM, processor and other peripherals while also communicating with the Arithmetic and Logic Unit (ALU).

The generation of control signals by the control unit is achieved using one of two organizations:

Hardwired Control Unit
Micro-programmed Control Unit
Hardwired control Unit
Hardware control units are implemented using combinatorial and logic circuits comprising gates, flip-flops, etc. in hardware, achieved by identification of the states required for the instruction set and derivation of the necessary Boolean logic for each step [2]. This implementation aims at producing a digital circuit that takes input from the status register, Opcode of the instruction, signals from the bus and the clock and produces the control signal that drives the other hardware components on the PC.
As a result of this organization of the control unit, it is fast since combinatorial logic circuits are responsible for control signal generation.
This organization however becomes more complicated as the size of the control unit becomes larger. Any modification to the design of the hardwired control unit implies a rewiring of the combinatorial circuits and may pose a great deal of difficulty especially for large units. A hardwired control unit typically consists of a number of control logic gates, an instruction register, a 4-bit sequence counter and two decoders. Fig 2 shows the organization of a hardwired control unit.
Reduced Instruction Set Computers (RISCs) are implemented using hardwired control. [2] RISCs stem from the idea to reduce to minimal the set of instructions needed to carry out essential processor operations. This is achieved by the use of few simple instructions of the same length and allowing memory access only with explicit load and store instructions. Complex instruction set computers (CISCs) are not implemented with hardwired control because of the complexity; it becomes very difficult to achieve [1].
For the operation of the hardwired control unit, an instruction is read from the main memory and placed in the instruction register (IR). The structure of the instruction register is such that there are three parts namely; the I bit, operation code, and address part. The first 12-bits (0-11) is used to specify an address, the next 3-bits is used to specify the operation code (opcode) field of the instruction and the last left most bit is used to specify the addressing mode I.
The address is applied to the control logic gates while the opcode bits are decoded with a decoder to know what the specific instruction is. The outputs from the 8-bit decoder is linked to the control logic gates and is used to perform the specific operation as specified by the opcode.

Micro-programmed Control Unit

Instead of the combinatorial circuit connection implementation in a hardwired control unit, a micro-programmed control unit is implemented programmatically. The control logic gates in hardwired control unit are replaced with array of memory that is used to generate the required logic control signals [3]. A sequence of micro operations is carried out by executing a program consisting of micro-instructions. These instructions are stored in the control memory of the control unit and generate control signals when executed.
A micro-instruction typically consists of one or more micro-operations (operations performed on register-stored data) and the address of the next microinstruction. The schematic of a micro-programmed control unit is shown in figure 3.
The control address register (CAR) stores the address of the micro-instruction to be executed while the micro-instruction corresponding to that address is fetched from the control memory and then stored in a register called the Control Data Register (CDR). The control word in the fetched micro-instruction is used to execute the micro-operations after which the address of the next instruction is fetched. The process of address selection for the control memory is shown in figure 4.
The use of micro-programmed control unit over hardwired control has some advantages as stated. Because software routines are employed in the design, it is not as complex as hardwired design. This also makes it easy to modify the control memory in order to implement a new CPU instruction set. Fault diagnosis is easier done with the aid of diagnostic tools [4].

However, it is much slower compared to the hardwired control unit because an instruction takes a longer time to execute.

CONCLUSION
The control unit still remains a very important part of the CPU, coordinating the operations of other units including the reading / writing of data to memory using timing signals generated from a timing circuit and interfacing with the Arithmetic and Logic Unit (ALU). Micro-operations are executed in each clock cycle in a series of fetch – execute – decode cycles. The control unit can be implemented using one of two organizations – hardwired control unit or micro-programmed control unit – depending on the requirements of the system to be designed. This is because each of the two control unit organizations has its strengths and weaknesses, higher speed of execution being the strength of hardwired control unit over micro-programmed control unit and increased circuit complexity being a disadvantage of hardwired control unit over micro-programmed unit.

REFERENCES

[1] Dumas, J.D. (2006). Computer Architecture: Fundamentals and Principles of Computer Design, Taylor & Francis Group, LLC, Boca Raton, FL, ISBN-13: 978-1-4200-5795-9.
[2] Balch, M. (2003). Complete Digital Design: A comprehensive Guide to Digital Electronics and Computer System Architecture, The McGraw-Hill Companies, Inc., ISBN: 0-07-140927-0.
[3] Koopman, P. Microcoded Versus Hard-wired Control: A Comparison of Two Methods for Implementing the Control Logic for a Simple CPU, Programmable Hardware.
[4] Stallings, W. (2010). Computer Organization and Architecture: Designing for Performance 8th Ed., Pearson Education, Inc., Upper Saddle River, NJ, ISBN-13: 978-0-13-607373-4.